Recently, there has been increased interest in recrystallizing thin layers of semiconductor, especially silicon, on a buried noncrystalline insulator layer, and this application is concerned with that version of semiconductor-on-insulator technology, and not with semiconductor-on-crystalline insulator (e.g., Si-on-sapphire) technology.
Electronic devices based on buried insulator structures offer promise of, inter alia, increased dielectric isolation, useful in, e.g., high voltage-high power devices, of reduced parasitic capacitance in integrated circuits, and of improved radiation hardness of devices. See, for instance, H. W. Lam et al, in VLSI Electronics: Microstructure Science, Vol. 4, N. G. Einspruch, editor, Academic Press (1982), pp. 1-54.
Typically, a layer of insulator material is formed on a semiconductor substrate, patterned, a layer of semiconductor material deposited thereover, the semiconductor layer melted in whole or in part, and one or more solidification fronts caused to advance laterally across the semiconductor layer. See, for instance, U.S. Pat. No. 4,323,417, issued Apr. 6, 1982, to H. W. Lam. Typically, a capping layer is formed atop the deposited semiconductor to, inter alia, prevent balling-up of molten semiconductor material. The capping layer typically comprises an oxide, e.g., SiO.sub.2. See U.S. Pat. No. 4,371,421, issued Feb. 1, 1983, to J. C. C. Fan et al (Fan).
Various heat sources have been used to melt the thin semiconductor layers, including strip heaters, electron or laser irradiation, and irradiation with high intensity radiation from, e.g., tungsten halogen lamps. Various techniques for recrystallization are also known to the art. Among the techniques is a global melting approach, typically comprising simultaneous exposure of a whole wafer to high intensity visible and infrared radiation (G. K. Celler et al, in Laser-Solid Interactions and Transient Thermal Processing of Materials, J. Narayan et al, editors, North Holland, N.Y. (1983), pp. 575-580). A different technique comprises zone melting, i.e., relatively slow scan of a strip-like hot zone across the sample.
In the zone-melting method, the sample, e.g., a wafer, is typically coupled to a heat source that maintains the sample at a temperature slightly below the melting temperature of the semiconductor material, and a strip-like hot zone (in which the semiconductor material is molten) is scanned across the sample. A variety of means exists for producing the moving hot zone, e.g., a line-focused laser or other light source, or an electron beam. Graphite strip heaters are also used in the prior art. See, for instance, the Fan patent or M. W. Geis et al, Journal of the Electrochemical Society: Solid State Science and Technology, Vol. 129(12), pp. 2812-2818 (1982).
The prior art shows that it is possible, by means of the zone-melting technique, to produce on buried SiO.sub.2 recrystallized (100)-oriented Si that is essentially free of large-angle grain boundaries. However, it appears that the recrystallized Si produced by prior art zone-melting techniques contains low-angle grain boundaries, often referred to as subboundaries, i.e., grain boundaries involving changes of crystal orientation of less than about 1 degree. See, for instance, M. W. Geis et al, Applied Physics Letters, Vol. 40(2), pp. 158-160 (1982). Since the presence of a subboundary within the active region of an electronic device, e.g., a transistor, is considered to be potentially detrimental to device performance, and subboundaries thus may reduce the manufacturing yield for devices produced in such recrystalline material, workers in the field have expended considerable effort on remedying this situation. However, to the best of our knowledge, up to now it has not been possible to produce subboundary-free Si films on buried SiO.sub.2 by the zone-melting method.
In order to circumvent the problem posed by the ubiquitous subboundaries, it has recently been proposed to "entrain" the subboundaries, i.e., cause them to be formed at predetermined locations in the layer. According to the proposal, this can be achieved by spatially modulating the layer temperature, e.g., by forming on top of the sample a grating that locally enhances either the absorption or reflection of the radiation incidence from the strip heater (M. W. Geis et al, Journal of the Electrochemical Society: Solid State Science and Technology, Vol. 130(5), pp. 1178-1183 (1983)).
As discussed in the prior art, it is currently thought that subboundaries arise when large facets form at the solidification front. In particular, such facets form in thin (i.e., about 1 .mu.m or less) unseeded Si layers that spontaneously grow with (100) orientation normal to the film, and with a [100] direction substantially parallel to the scan direction, as well as in seeded (100) Si layers. The latter are customarily grown by scanning along a [100] direction of the seed. The thus formed facets are thought to intersect the (100) surface along [110] directions, and are also thought to be bounded by (111) planes. Subboundaries are thought to originate at the interior corners of the faceted front where two (111) planes meet (ibid., pp. 1179-1180).
Because of the substantial technological and economic importance of grain boundary-free (including subboundary-free) semiconductor material of high crystalline perfection on buried insulator, especially of Si on SiO.sub.2, techniques for producing such material by lateral recrystallization would be of great value. This application discloses improved methods that can produce such material.